Title: PHYs and symmetrical propagation delay : study on propagation delay variation of 100Base-TX ethernet PHY chips
Authors : Müller, Thomas
Weibel, Hans
Blattner, Jörg
Ockert, Alexander
Proceedings: 2004 Conference on IEEE 1588, Standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Systems
Pages : 78
Pages to: 84
Conference details: 2004 Conference on IEEE 1588, Standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Systems, NIST, Gaithersburg, 2004
Publisher / Ed. Institution : NIST
Publisher / Ed. Institution: Gaithersburg
Issue Date: 2004
License (according to publishing contract) : Licence according to publishing contract
Series : NISTIR
Series volume: 7192
Type of review: Not specified
Language : English
Subjects : Ethernet; Synchronisation; Physical layer
Subject (DDC) : 004: Computer science
Abstract: The Institute of Embedded Systems develops devices for different hard real time Ethernet applications. In such use cases, precise knowledge of data propagation delay of Ethernet PHY chips is crucial (e.g. for precise time stamping in protocol analyzers of for IEEE 1588 enabled network interface cards). This document describes the analysis of a typical PHY chip in detail. Other PHY chips showed similar behaviour. It is expected that the observed timing characteristic is common to many 100Base-TX transceivers.
Departement: School of Engineering
Organisational Unit: Institute of Embedded Systems (InES)
Publication type: Conference Paper
URI: https://digitalcollection.zhaw.ch/handle/11475/6196
Appears in Collections:Publikationen School of Engineering

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