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dc.contributor.authorMüller, Thomas-
dc.contributor.authorWeibel, Hans-
dc.contributor.authorBlattner, Jörg-
dc.contributor.authorOckert, Alexander-
dc.date.accessioned2018-05-29T13:00:06Z-
dc.date.available2018-05-29T13:00:06Z-
dc.date.issued2004-
dc.identifier.urihttps://digitalcollection.zhaw.ch/handle/11475/6196-
dc.description.abstractThe Institute of Embedded Systems develops devices for different hard real time Ethernet applications. In such use cases, precise knowledge of data propagation delay of Ethernet PHY chips is crucial (e.g. for precise time stamping in protocol analyzers of for IEEE 1588 enabled network interface cards). This document describes the analysis of a typical PHY chip in detail. Other PHY chips showed similar behaviour. It is expected that the observed timing characteristic is common to many 100Base-TX transceivers.de_CH
dc.language.isoende_CH
dc.publisherNISTde_CH
dc.rightsLicence according to publishing contractde_CH
dc.subjectEthernetde_CH
dc.subjectSynchronisationde_CH
dc.subjectPhysical layerde_CH
dc.subjectNISTIR 7192de_CH
dc.subject.ddc004: Informatikde_CH
dc.titlePHYs and symmetrical propagation delay : study on propagation delay variation of 100Base-TX ethernet PHY chipsde_CH
dc.typeKonferenz: Paperde_CH
dcterms.typeTextde_CH
zhaw.departementSchool of Engineeringde_CH
zhaw.organisationalunitInstitute of Embedded Systems (InES)de_CH
zhaw.publisher.placeGaithersburgde_CH
zhaw.conference.details2004 Conference on IEEE 1588, Standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Systems, Gaithersburg, USA, 27-29 September 2004de_CH
zhaw.funding.euNode_CH
zhaw.originated.zhawYesde_CH
zhaw.pages.end84de_CH
zhaw.pages.start78de_CH
zhaw.publication.statuspublishedVersionde_CH
zhaw.publication.reviewPeer review (Abstract)de_CH
zhaw.title.proceedings2004 Conference on IEEE 1588, Standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Systemsde_CH
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Müller, T., Weibel, H., Blattner, J., & Ockert, A. (2004). PHYs and symmetrical propagation delay : study on propagation delay variation of 100Base-TX ethernet PHY chips [Conference paper]. 2004 Conference on IEEE 1588, Standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Systems, 78–84.
Müller, T. et al. (2004) ‘PHYs and symmetrical propagation delay : study on propagation delay variation of 100Base-TX ethernet PHY chips’, in 2004 Conference on IEEE 1588, Standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Systems. Gaithersburg: NIST, pp. 78–84.
T. Müller, H. Weibel, J. Blattner, and A. Ockert, “PHYs and symmetrical propagation delay : study on propagation delay variation of 100Base-TX ethernet PHY chips,” in 2004 Conference on IEEE 1588, Standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Systems, 2004, pp. 78–84.
MÜLLER, Thomas, Hans WEIBEL, Jörg BLATTNER und Alexander OCKERT, 2004. PHYs and symmetrical propagation delay : study on propagation delay variation of 100Base-TX ethernet PHY chips. In: 2004 Conference on IEEE 1588, Standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Systems. Conference paper. Gaithersburg: NIST. 2004. S. 78–84
Müller, Thomas, Hans Weibel, Jörg Blattner, and Alexander Ockert. 2004. “PHYs and Symmetrical Propagation Delay : Study on Propagation Delay Variation of 100Base-TX Ethernet PHY Chips.” Conference paper. In 2004 Conference on IEEE 1588, Standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Systems, 78–84. Gaithersburg: NIST.
Müller, Thomas, et al. “PHYs and Symmetrical Propagation Delay : Study on Propagation Delay Variation of 100Base-TX Ethernet PHY Chips.” 2004 Conference on IEEE 1588, Standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Systems, NIST, 2004, pp. 78–84.


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