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dc.contributor.authorWeiss, Armin-
dc.contributor.authorRosenthal, Matthias-
dc.date.accessioned2018-05-29T12:53:52Z-
dc.date.available2018-05-29T12:53:52Z-
dc.date.issued2017-03-15-
dc.identifier.urihttps://digitalcollection.zhaw.ch/handle/11475/6192-
dc.description.abstractMany embedded applications have to cope with real-time data streams, e.g. video, audio, network, sensor data, etc. Real-time processing of fast data streams with low latency is a hard requirement which is often only achieved using dedicated hardware accelerators. FPGA’s provide an ideal basis for integrating specific hardware blocks, however, their development in VHDL or Verilog is a time consuming process. As an alternative, FPGA manufacturers have started to support OpenCL as the programming language for building hardware blocks. OpenCL is ideally suited for implementing streaming algorithms typically on multi-core CPUs or GPUs. On the other hand, using OpenCL on an FPGA requires new concepts for data transfer and real-time control of hardware blocks. In return, a reduced time-to-market can be expected because the OpenCL compiler takes care of time consuming tasks like the timing analysis and the implementation of state machines. This paper gives an overview on how OpenCL code is translated into hardware and shows the difference to traditional OpenCL implementations on multi-core CPUs or GPUs. Moreover, a new concept of a generic platform for streaming applications is presented, which allows the user to program own streaming-kernels in hardware using OpenCL. Efficient data input and output is guaranteed because the stream remains in the FPGA and is never transferred to the global memory or to the CPU. Real-time control of streaming-kernels is handled by the platform using the CPU of the SoC. The development workflow is demonstrated using the example of a color space converter. The implementation is done on an Altera Cyclone-V SoC. Measurements and limitations are discussed and the usability for general streaming applications is outlined.de_CH
dc.language.isoende_CH
dc.rightsNot specifiedde_CH
dc.subjectStreamingde_CH
dc.subjectAlterade_CH
dc.subjectOpenCLde_CH
dc.subjectFPGAde_CH
dc.subject.ddc005: Computerprogrammierung, Programme und Datende_CH
dc.titleOpenCL streaming platform on FPGAde_CH
dc.typeKonferenz: Sonstigesde_CH
dcterms.typeTextde_CH
zhaw.departementSchool of Engineeringde_CH
zhaw.organisationalunitInstitute of Embedded Systems (InES)de_CH
zhaw.conference.detailsEmbedded World Conference, Nuremberg, Germany, 14-16 March 2017de_CH
zhaw.funding.euNode_CH
zhaw.originated.zhawYesde_CH
zhaw.publication.statuspublishedVersionde_CH
zhaw.publication.reviewNot specifiedde_CH
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Weiss, A., & Rosenthal, M. (2017, March 15). OpenCL streaming platform on FPGA. Embedded World Conference, Nuremberg, Germany, 14-16 March 2017.
Weiss, A. and Rosenthal, M. (2017) ‘OpenCL streaming platform on FPGA’, in Embedded World Conference, Nuremberg, Germany, 14-16 March 2017.
A. Weiss and M. Rosenthal, “OpenCL streaming platform on FPGA,” in Embedded World Conference, Nuremberg, Germany, 14-16 March 2017, Mar. 2017.
WEISS, Armin und Matthias ROSENTHAL, 2017. OpenCL streaming platform on FPGA. In: Embedded World Conference, Nuremberg, Germany, 14-16 March 2017. Conference presentation. 15 März 2017
Weiss, Armin, and Matthias Rosenthal. 2017. “OpenCL Streaming Platform on FPGA.” Conference presentation. In Embedded World Conference, Nuremberg, Germany, 14-16 March 2017.
Weiss, Armin, and Matthias Rosenthal. “OpenCL Streaming Platform on FPGA.” Embedded World Conference, Nuremberg, Germany, 14-16 March 2017, 2017.


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