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Publikationstyp:	Konferenz: Sonstiges
Art der Begutachtung:	Keine Angabe
Titel:	OpenCL streaming platform on FPGA
Autor/-in:	Weiss, Armin Rosenthal, Matthias
Angaben zur Konferenz:	Embedded World Conference, Nuremberg, Germany, 14-16 March 2017
Erscheinungsdatum:	15-Mär-2017
Sprache:	Englisch
Schlagwörter:	Streaming; Altera; OpenCL; FPGA
Fachgebiet (DDC):	005: Computerprogrammierung, Programme und Daten
Zusammenfassung:	Many embedded applications have to cope with real-time data streams, e.g. video, audio, network, sensor data, etc. Real-time processing of fast data streams with low latency is a hard requirement which is often only achieved using dedicated hardware accelerators. FPGA’s provide an ideal basis for integrating specific hardware blocks, however, their development in VHDL or Verilog is a time consuming process. As an alternative, FPGA manufacturers have started to support OpenCL as the programming language for building hardware blocks. OpenCL is ideally suited for implementing streaming algorithms typically on multi-core CPUs or GPUs. On the other hand, using OpenCL on an FPGA requires new concepts for data transfer and real-time control of hardware blocks. In return, a reduced time-to-market can be expected because the OpenCL compiler takes care of time consuming tasks like the timing analysis and the implementation of state machines. This paper gives an overview on how OpenCL code is translated into hardware and shows the difference to traditional OpenCL implementations on multi-core CPUs or GPUs. Moreover, a new concept of a generic platform for streaming applications is presented, which allows the user to program own streaming-kernels in hardware using OpenCL. Efficient data input and output is guaranteed because the stream remains in the FPGA and is never transferred to the global memory or to the CPU. Real-time control of streaming-kernels is handled by the platform using the CPU of the SoC. The development workflow is demonstrated using the example of a color space converter. The implementation is done on an Altera Cyclone-V SoC. Measurements and limitations are discussed and the usability for general streaming applications is outlined.
URI:	https://digitalcollection.zhaw.ch/handle/11475/6192
Volltext Version:	Publizierte Version
Lizenz (gemäss Verlagsvertrag):	Keine Angabe
Departement:	School of Engineering
Organisationseinheit:	Institute of Embedded Systems (InES)
Enthalten in den Sammlungen:	Publikationen School of Engineering

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