1. ZHAW digitalcollection
  2. School of Engineering
  3. Publikationen
  4. Publikationen School of Engineering
Full metadata record
DC FieldValueLanguage
dc.contributor.authorTordoya Taquichiri, Carlos Rafael-
dc.contributor.authorGanz, David-
dc.contributor.authorBuchheim, Klaus-
dc.date.accessioned2024-06-07T14:35:28Z-
dc.date.available2024-06-07T14:35:28Z-
dc.date.issued2024-05-28-
dc.identifier.urihttps://digitalcollection.zhaw.ch/handle/11475/30808-
dc.description.abstractThe space application domain demands robust and dependable hardware, often necessitating the use of radiation-hardened (rad-hardened) components, notably processors and memory. This limitation poses challenges when implementing modern algorithms, particularly those with high computational complexity such as AI-based classification, within real-time constraints. This paper introduces the High Performance Data Processor (HPDP-40), a unique radiation-hardened co-processor designed for space applications. The HPDP-40 features low power consumption, runtime reconfigurability, and a compact form, making it suitable for computationally intensive tasks. To address the constraints imposed by rad-hardened components, we propose deploying the HPDP-40 in conjunction with an optimized AI-pipeline. Despite successful testing on AI applications, a lack of a generic AI framework for the HPDP limits broader implementation. This paper presents an implementation effort involving the porting of an optimized AI-pipeline to the HPDP-40, showcasing the structured partitioning of the pipeline and its mapping across various processors and functional units. The proposed solution offers a streamlined approach to deploying AI models on the HPDP-40, as it leverages compatibility with major AI frameworks and eliminates the need for specific HPDP coding. This not only simplifies the integration process but also opens avenues for AI applications in future European Space Agency (ESA) missions with stringent availability requirements, such as landers and deep space robotics. The presented hardware/software stack could contribute to reinforcing Europe's capability to utilize AI effectively in space exploration. The paper concludes with performance measurements, insights, and recommendations for future work in this promising intersection of space technology and artificial intelligence.de_CH
dc.language.isoende_CH
dc.rightsLicence according to publishing contractde_CH
dc.subjectArtificial Intelligence (AI)de_CH
dc.subjectPipelinede_CH
dc.subjectAccelerationde_CH
dc.subjectHigh Performance Data Processor (HPDP)de_CH
dc.subjectPerformancede_CH
dc.subjectRadiationde_CH
dc.subjectProcessorde_CH
dc.subjectSpacede_CH
dc.subject.ddc006: Spezielle Computerverfahrende_CH
dc.titleReconfigurable hardware revisited : implementing an optimised AI pipeline on the HPDP processorde_CH
dc.typeKonferenz: Sonstigesde_CH
dcterms.typeTextde_CH
zhaw.departementSchool of Engineeringde_CH
zhaw.organisationalunitInstitute of Embedded Systems (InES)de_CH
zhaw.conference.detailsEmbedded Computing Conference (ECC), Winterthur, Switzerland, 28 May 2024de_CH
zhaw.funding.euNode_CH
zhaw.originated.zhawYesde_CH
zhaw.publication.statuspublishedVersionde_CH
zhaw.publication.reviewPeer review (Abstract)de_CH
zhaw.author.additionalNode_CH
zhaw.display.portraitYesde_CH
Appears in collections:Publikationen School of Engineering

Files in This Item:
There are no files associated with this item.
Show simple item record
Tordoya Taquichiri, C. R., Ganz, D., & Buchheim, K. (2024, May 28). Reconfigurable hardware revisited : implementing an optimised AI pipeline on the HPDP processor. Embedded Computing Conference (ECC), Winterthur, Switzerland, 28 May 2024.
Tordoya Taquichiri, C.R., Ganz, D. and Buchheim, K. (2024) ‘Reconfigurable hardware revisited : implementing an optimised AI pipeline on the HPDP processor’, in Embedded Computing Conference (ECC), Winterthur, Switzerland, 28 May 2024.
C. R. Tordoya Taquichiri, D. Ganz, and K. Buchheim, “Reconfigurable hardware revisited : implementing an optimised AI pipeline on the HPDP processor,” in Embedded Computing Conference (ECC), Winterthur, Switzerland, 28 May 2024, May 2024.
TORDOYA TAQUICHIRI, Carlos Rafael, David GANZ und Klaus BUCHHEIM, 2024. Reconfigurable hardware revisited : implementing an optimised AI pipeline on the HPDP processor. In: Embedded Computing Conference (ECC), Winterthur, Switzerland, 28 May 2024. Conference presentation. 28 Mai 2024
Tordoya Taquichiri, Carlos Rafael, David Ganz, and Klaus Buchheim. 2024. “Reconfigurable Hardware Revisited : Implementing an Optimised AI Pipeline on the HPDP Processor.” Conference presentation. In Embedded Computing Conference (ECC), Winterthur, Switzerland, 28 May 2024.
Tordoya Taquichiri, Carlos Rafael, et al. “Reconfigurable Hardware Revisited : Implementing an Optimised AI Pipeline on the HPDP Processor.” Embedded Computing Conference (ECC), Winterthur, Switzerland, 28 May 2024, 2024.


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.